In the field of semiconductor device manufacturing, active semiconductor devices are generally manufactured by front end of the line (FEOL) technologies. Such active semiconductor devices may include, e.g., transistors like field-effect-transistors (FET) and particularly complementary metal-oxide-semiconductor field-effect-transistors (CMOS-FET). Among different types of CMOS-FETs there may be a p-type doped CMOS-FET (PFET) and an n-type doped CMOS-FET (NFET). Different types of CMOS-FETs may be formed or manufactured on a common substrate or structure, of a semiconductor chip or wafer.
In pursuing further performance improvement of CMOS-FET transistors and devices thereof, dielectric materials of high dielectric constant, commonly known as k value of the dielectric material, have recently been used in forming part of the gate stack of CMOS-FET transistors. Additionally, other technologies for performance improvement may include using metal gate material instead of traditional gate material such as, for example, poly-silicon for better tailoring of threshold voltage and channel mobility. More specifically, with the application of metal gate on high k dielectric gate material, better screening of phonon scattering may be achieved in the dielectric which, as a result of lower defectives of metal comparing with traditional poly-silicon/high k dielectric interface, creates improved mobility of electrons and reduced Fermi level pinning, all of which contribute toward achieving desired threshold voltages of the CMOS-FET transistors and devices made from the transistors.
During a regular process of forming gate stacks, hard-masks are usually used to protect gate stack materials, which have been formed on a substrate, in areas where gate stacks are planned or designed to be formed eventually. Hard-masks are used in such a way that gate stack materials in areas, other than areas forming gate stacks, may be removed or etched away through a patterning process such as a wet-etching process. One of the most commonly used hard-masks, for example, is a combination of amorphous silicon with silicon dioxide (SiO2) thereupon.
As is commonly known in the art, ammonia solutions have been generally used in wet-etching processes to etch silicon. However, regular ammonia solutions are typically selective to silicon oxide, which means that regular ammonia solutions will not etch, or at least not be able to provide effective etching of silicon oxide or silicon dioxide. Therefore, in order to be able to use a hard-mask made of amorphous silicon with silicon-dioxide covering the top thereof in the process, there may exist a need to use ammonia solutions of high concentration in order to break through the screen silicon oxide on top of the amorphous silicon before the underneath amorphous silicon may get etched and so patterned. Nevertheless, while ammonia solutions of high concentration may be able to break through the screen silicon oxide for the purpose of patterning underneath amorphous silicon, they have been known as a source of causing defectives in the silicon, such as causing impurity being etched out of silicon, resulting in deteriorations of devices made from the process. Therefore, there exists in the art a need for better and/or alternative processes and/or method of forming gate stack in making high-k metal gate (HK-MG) transistors.